Fast image simulation for photolithography

ABSTRACT

A fast method simulates photolithography using conventional image processing techniques. Convolution simulates for blurring; erosion and dilation correct for edge diffraction. In one technique, the source image of the photomask is deconvolved to sharpen it and then dilated to remove edge diffraction. The image is eroded, and then convolved according to the resolution of the stepper at the photomask plane. This aerial image can be further eroded to match the effects of resist and developing. Optional thresholding is done to produce a simulated processed wafer image. In a fast technique, the deconvolution step is eliminated. Dilation and erosion are combined into a single erosion. Where a phase shift mask is involved, a complex convolution is used. Source data can come from the photomask electronic design or from a visual image of the actual photomask. Optimizations include: special microprocessor instructions, floating point pixel values, separable convolution and annular illumination simulation.

FIELD OF THE INVENTION

The present invention relates generally to photolithography. More specifically, the present invention relates to the simulation of an image during semiconductor manufacturing.

BACKGROUND OF THE INVENTION

Photolithography is the process of transferring geometric shapes on a photographic mask to the surface of a silicon wafer; it falls under the more broad category of microlithography. A photographic mask (or “photomask”), typically a glass plate with a patterned emulsion of metal film on one side, is used in photolithography to create integrated circuits. Chromium (chrome) is typically used to produce the pattern on the photomask.

The successful manufacture of advanced sub-micron sized semiconductor devices requires accuracy in production of the photomask, and in the photolithography processes used to pattern the wafer. Photolithography processes for semiconductor manufacturing frequently use image simulation for predicting the outcome of the manufacturing process. Simulation allows an evaluation of the quality of the product before spending time and money producing the actual product. The simulation takes as input either the electronic, geometrical design of the circuit to be produced, or the observed photomask image made from that design. The output is either a representation of the image as formed on the resist on the wafer, the so-called “aerial image,” or a representation of the result after the wafer has been exposed and developed.

The current standard procedure, as implemented in products such as VSS by Numerical Technologies, Inc. and ProLith by KLA-Tencor, is to use the Hopkins Method for modeling the electric fields that create the final image on the wafer. The Hopkins method is described in the following references, which are incorporated by reference: the Kirchauer Thesis available at http://www.iue.tuwien.ac.at/publications/PhD%20Theses/kirchauer/node62.html; Professor Neurcuther's work on UC Berkeley's “SPLAT” simulation programi, available at http//cuervo.ccs.berkeley.edu/Volcano/applications/Defect/directory.html; and A. K. Wong and A. R. Neureuther, Rigorous Three-Dimensional Time-Domain Finite-Difference Electromagnetic Simulation for Photolithographic Applications, IEEE Trans. Semicond. Manufact., 8(4):419-431, November 1995).

The Hopkins Method requires a large number of calculations, and therefore is quite slow. A faster technique for simulating an image would be highly desirable. Faster simulation is important anywhere simulation is used. In photomask defect detection and analysis it allows determination of defect severity on the resultant wafer at a rate similar to the speed of current mask inspection machines. This greatly reduces the number of false defects reported while increasing the available sensitivity of inspections. Reduced false defect reports decreases costs involved with 1) reviewing reported defects 2) repairing false defects 3) damage caused by repair, and 4) re-inspecting masks after repair. Increasing sensitivity allows using existing inspection machines for newer, smaller geometry chip designs.

Fast simulation is also important for chip design and photolithography process development. A faster simulation method would allow more iterations of a chip design to optimize feature placement and optical enhancement techniques. It would also allow more of a chip's logic to be simulated to verify correct operation in the finished product.

SUMMARY OF THE INVENTION

To achieve the foregoing, and in accordance with the purpose of the present invention, a fast method of simulating the results of imaging and wafer processing using conventional image processing techniques is disclosed. The present invention uses conventional image processing techniques to produce an improved result with less computation. A typical speed increase is 5000× compared to the Hopkins Method.

This method models two optical processes to produce an accurate simulation more quickly: blurring and edge diffraction. Blurring is introduced by the optical resolution of the projection lens. This is defined in optical texts as the Rayleigh resolution criterion: Res=/0.61λ/NA, where λ is the wavelength of light used in the microscope, and NA is the Numerical Aperture of the main microscope lens, a measure of the lens's diameter. NA is defined as NA=n/2f#, where n is the index of refraction of the glass, and f# is the ratio of the lens focal length to its diameter. Edge diffraction, as defined in elementary physics texts, causes opaque areas to appear larger in a microscope than if measured mechanically. The nature of this edge diffraction is that photons that graze close to the edge of an opaque area get diffracted away from the microscope objective lens, causing the opaque area to appear larger optically than it is physically. Convolution with a gaussian kernel simulates the blurring; erosion and dilation simulate the edge diffraction.

Convolution and deconvolution are known image processing techniques that can be performed by several methods, as described in The Image Processing Handbook, by John C. Russ, CRC Press, 1992, incorporated herein by reference.

Erosion is a known image processing technique and may be performed by replacing each pixel with the darkest of the nine pixels adjacent to it, including itself. Dilation is the opposite function, replacing each pixel with the brightest of the nine pixels adjacent to it, including itself. References to methods of performing erosion apply to dilation by replacing “minimum” by “maximum.” In the literature these are referred to as gray scale erosion and gray scale dilation in “The Image Processing Handbook” mentioned above.

In a first embodiment of the invention, the transmission optical source image of the photomask is deconvolved to remove optical blurring, which is then dilated to remove edge diffraction as described above. This produces a simulated physical image corresponding to a theoretical infinite resolution optical microscope. This intermediate simulated physical image is eroded, and then convolved according to the resolution of the stepper at the photomask plane. This convolution produces a simulated image projected onto the wafer, or a “simulated wafer aerial image.” This aerial image can then be further eroded to match the effects of resist and developing, producing a “simulated wafer resist image.” Optional thresholding may be performed on the simulated wafer resist image to produce a simulated processed wafer image. Thresholding is described in Russ mentioned above, incorporated by reference herein.

In a second embodiment of the invention useful in practice, several steps are combined. The microscope resolution is typically two to three times higher than the stepper resolution being simulated. This fact allows steps to be combined because deconvolution as a separate step is not required. Thus, the deconvolution step may be eliminated by reducing the amount of blurring used to produce the aerial image. In addition, the dilation and erosion steps used to produce the aerial image are combined into a single erosion.

Where a phase shift mask is involved, a complex convolution is used. A phase shift mask has areas where the glass substrate is thinned, usually by an amount that causes the light to be delayed by ½ wavelength, or a phase of 180 degrees. This phase shift of 180 degrees causes dark destructive interference at the edge between the shifted and unshifted areas. The interference causes edges to appear sharper on the wafer, and that allows for more focus and illumination error during printing while yielding good devices. This technique is explained in Kirchauer, cited above.

Complex convolution is the same as standard convolution except that the data (images and kernel) are complex numbers that represent magnitude and phase. The pixel values in the source image are converted from energy to voltage by taking the square root. At the end the pixel values are squared to convert voltage back to energy or magnitude. Basically, an image is converted to complex values (electric field and phase) where there is a fixed phase difference between the clear and dark regions. This requires knowing the design phase difference (typically 180 degrees) and transmission through the dark areas, typically 0% or 6% of the clear transmission, depending on the type of phase shift mask at the stepper wavelength. Other values of phase shift and transmission can be simulated, although the literature does not discuss their use at this time.

The source image is then adjusted by replacing the original dark area values by the design transmission values, and then setting the phase information by setting it to zero typically for the clear pixels, and setting it to the design phase for the dark pixels. In alternating type phase shift masks the phase of the dark areas is set to zero, and the clear areas arc set alternately to zero and the design phase. The convolution kernel has a gaussian intensity distribution, and an optional phase part that corresponds to the illumination partial coherence, as described in Kirchauer, above. After the complex convolution the pixel values are squared to convert the electric field values back to energy or intensity.

Thus, a fast image simulation results. Using the ProLith product from KLA-Tencor on similar images, for example, an image can be simulated 1,000 times faster while using a CPU fourteen times slower (total of 14,000 times faster) than reported by Intel Corporation in Primadonna: A System For Automated Defect Disposition Of Production Masks Using Wafer Lithography Simulation, by Dan Bald et al., SPIE Bacus 2002. Further, the source data can come from an image generated from the photomask electronic design or from an optical or non-optical (such as SEM, FIB, AFM) image of the actual photomask.

The simulated image may then be used to calculate edge position errors, CD errors, feature position errors and contrast errors. Because the simulation occurs much more quickly, these measurements can be used to decrease false defect reports from inspection tools, and to allow for increased sensitivity of inspection tools. A faster simulation also helps to accelerate process development for new products by allowing more variables to be tried, and improves OPC (optical proximity correction) techniques as more adjustments can be tried.

BRIEF DESCRIPTION OF THE DRAWINGS

The invention, together with further advantages thereof, may best be understood by reference to the following description taken in conjunction with the accompanying drawings in which:

FIG. 1 illustrates a simulation system in accordance with an embodiment of the present invention.

FIG. 2 illustrates a first embodiment for simulation using deconvolution, erosion and dilation.

FIG. 3 is a flow diagram describing the simulation shown in FIG. 2.

FIG. 4 illustrates a second embodiment for simulation using erosion and convolution.

FIG. 5 is a flow diagram describing the simulation shown in FIG. 4.

FIG. 6 is a flow diagram describing how convolution of an image may occur when a phase shift mask is involved.

FIGS. 7A and 7B illustrate a computer system suitable for implementing embodiments of the present invention.

DETAILED DESCRIPTION OF THE INVENTION

FIG. 1 illustrates a simulation system 10 in accordance with an embodiment of the present invention. System 10 includes a video inspection machine 12, a computer system 30 and a printer 16. Video inspection machine 12 may be one of a wide variety of automatic inspection tools that analyze microscopic particles, lines, dimensions, etc., and outputs a video image of the item that it is analyzing. By way of example, machine 12 may be a KLA 3xx or 5xx automatic inspection tool used for inspecting photographic masks that are used in the manufacture of semiconductor devices. Other measurement systems can be used such as KMS 100 from Zygo Corporation or LWM 250uv from Leica Microsystems; other repair systems can be used such as DRS-2 from Quantronics, or simple microscopes can be used. Although the present invention is primarily designed for use with transmission microscope images, it can be used with reflection images with some loss in accuracy by using black-white reversal and erosion to simulate reflective edge diffraction.

Machine 12 includes a video camera 20 having a lens tube 22 and a lens 24 that is inspecting a medium 26. Light source 28 provides light from below medium 26 to allow for a transmission light image to be received by camera 20. Medium 26 may be one of a wide variety of media having microscopic features that are suitable for analysis by the present invention. By way of example, medium 26 is a glass reticule having a chrome pattern upon it forming a mask used in semiconductor manufacturing. Also, a wide variety of other media may be suitable for use with present invention. For example, media such as silicon wafers, printed circuit boards, other transparent media, and other types of masks may have analysis performed upon them using any of the various techniques of the present invention. In one embodiment, a multi-input option may be used in which two or more inspection machines of different types provide video data to the system. Other implementations may include using images derived from the mask design data or from non-optical images, such as from repair tools. Repair tools often create images from scanned electron beams (SEM) or focused ion beams (FIB) or from atomic force microscopes (AFM) Computer system 30 may be any suitable computer system for embodying the present invention. By way of example, computer system 30 may be a personal computer with at least 64 MB memory, a CPU running faster than 200 MHz, and hard disk capacity larger than 5 GB, and any operating system, such as a Microsoft operating system, Sun Solaris, Linux, Apple OS X or others, having hardware 14, a high resolution monitor 32, a keyboard 34 and a mouse or track ball 36. Printer 16 is also connected to computer system 30 for allowing results of analysis to be printed. Computer system 30 is connected to machine 12 via cable 38 which may be a local area network or any suitable cable for transmitting raw video output data from machine 12 to computer system 30. Preferably, the video data from machine 12 travels in digital form via local area network. Alternatively a video signal travels to high-resolution video capture hardware such as Flashbus Lite board from Integral Technologies in the computer that converts the video analog signal to digital form. A wide variety of computer configurations may be used; one alternative embodiment for a computer system 30 is shown in FIGS. 7A and 7B.

Other equipment may be used in conjunction with an aspect of the invention. For example, the present invention discusses use of a “stepper.” A stepper is a piece of equipment used in the manufacture of integrated circuits (among other applications) during the photolithography process. A stepper is simply a transparency projector, with the special application of projecting the microscopic features, which comprise the integrated circuitry from a transparent mask onto a wafer. For example, ASML Model # PAS 2500 from ASML of the Netherlands and NSR-2205i11 D from Nikon Precision are typical steppers. The stepper projects these features in a series of adjacent image areas by “stepping” the image of a photomask across the material (a wafer) which is being used to make the integrated circuits. Also, a high-resolution microscope, such as leica DM IRM, or Nikon model E 600 may be used to most accurately determine the appearance and size of features on a photomask or the resultant wafer. For example, a scanning electron microscope (SEM) or an atomic force microscope (AFM) may be used. Simulation is used to reduce the need for such measurement tools.

First Simulation Embodiment

As pointed out above, the present invention models blurring and edge diffraction to quickly produce an accurate simulation. As is commonly known, an image taken of a photomask (using a typical video inspection machine) having sub-micron dimensions will appear blurred as described above in the Rayleigh criterion by the resolution of the optical system. This blurring is corrected, typically by deconvolution. Images that come directly from the mask design, without optics, will not require this correction.

Photons that come closcr to the edge than Res/4.4, where Res is the Rayleigh resolution, are diffracted beyond the opening of the objective lens and appear to be blocked by the dark area of the photomask. This diffraction causes dark areas to appear larger at low optical resolution than at high resolution. A dark line, which consists of two edges, is observed to be Res/2.2 larger than observed with an SEM, and a clear line is observed to be smaller by the same amount. Because these lines appear in a photomask image to be of different sizes than they actually are, it can prove difficult to produce a simulation of how the final wafer will appear. Advantageously, the present invention realizes that edge diffraction can be modeled, and be compensated for, by the known image processing functions called erosion and dilation. Erosion causes bright areas of the mask to shrink (erode), while dilation causes bright areas to expand. Dark areas are affected by erosion and dilation in the opposite way.

FIG. 2 illustrates a first embodiment for simulation using deconvolution, erosion and dilation. FIG. 3 is a flow diagram describing the simulation shown in FIG. 2, and will be explained in the context of FIG. 2. In step 210 a source image 110 of a photomask is obtained. Image 110 is an image of only a portion of a photomask, used for ease of understanding the invention; larger regions are also possible. Preferably, image 110 is a digitized intensity source image obtained from an optical transmission source, such as any of the video inspection machines described above. Other types of images may be used, although it is preferable if they are converted to appear as an optical transmission image by converting the opaque areas to black, and the clear areas to white (or bright). Alternatively, the source image may be generated from the electronic photomask layout design. Generating the image from the electronic design is a step known to those of skill in the microlithography art and is typically performed by data management programs such as the CATS product from Numerical Technologies, Inc. Generating the image from the design is usually performed by simulating the action of the mask writing machine in software. The output is a binary image (black and white with no grays) that exactly corresponds to the mask to be made.

In this example, the image 110 of the photomask shows clear regions 112, which appear bright, and chrome lines of the photomask 114, which appear dark, four lines being shown. Of course, using other illumination techniques, the lines may originally appear bright and the clear regions may appear dark. In those cases the original image would be dark/bright reversed to produce this image. Shown for ease of understanding is a very simplistic image 110 with only four lines. Of course, the present invention is applicable to much more complex photomask designs, such as those found in a Pentium microprocessor chip from Intel.

In step 220 deconvolution is applied to the source image to obtain a sharp deconvolved image 120, where the edges go from black to white with no blurring, or gray levels in between. Deconvolution may be performed in a variety of manners, some of which are known in the art. A Fourier Transform or Fast Fourier Transform may be used. Or, a deconvolution kernel is generated from the modulation transfer function (MTF) and then convolved. Or the following novel iterative method may be used.

First, threshold the source image to produce a sharp simulation image of the original binary object. Next, blur that object simulation image by convolving it with the MTF, thus producing an image simulation. Then, subtract the image simulation from the original source image, producing an error image. Then, use the intensity of the error image at the edge positions in the object simulation to adjust the object simulation edge positions, in order to reduce the amplitude of the error image. Finally, repeat as many times as necessary the above blurring, subtraction, and adjustment steps until the maximum error image intensity is less than a certain fraction, usually 1%, of the maximum simulation image intensity. The result is the deconvolved image 120.

Next, dilation and erosion are performed. In this disclosure a sub-pixel erosion technique works well, where the amount of erosion is intermediate between zero and one pixel. Erosion by fractional values greater than one pixel can be performed by repeated single pixel erosion, as described above, or by a single erosion using pixels in a larger neighborhood, such as the twenty-five pixels that are within a two-pixel distance from the original pixel. Sub-pixel erosion or dilation can be accomplished by several methods. These methods include: a) the preferred method of blending the original pixel with the eroded or dilated value (for example, an erosion of 0.4 pixel would add 40% of the eroded value to 60% of the original pixel); and b) rescaling the image to a different size in pixels (such as with the Microsoft operating system function “StretchDIBits”), so that the required erosion is a single pixel, and then eroding the image and rescaling it to the original size in pixels (a zoom in, erode, zoom out sequence). Both methods produce the same result. Other methods of producing the same results may be used. In this discussion erosion and dilation are assumed to be sub-pixel implementations.

In step 230 dilation is performed on image 120 to produce simulated physical image 130. As edge diffraction had appeared to widen lines 114 in image 120, dilation corrects the edge positions of these lines, essentially shrinking them back to what their true physical appearance would be. Image 130 shows the lines as being slightly narrower. Dilation is a known image processing technique and may be performed by replacing each pixel with the brightest of the nine pixels adjacent to it, including itself.

Next, in step 240 erosion is performed on image 130 to produce a simulated mask on stepper image 140. The erosion of step 240 is used to correct the line widths to help match the effect of the resolution of the source image optics. Image 140 shows the lines as being slightly wider than those in image 130. Because the stepper has lower resolution optics than the source image optics, when the stepper projects the mask image onto the wafer, the chrome lines will be projected on the wafer as being relatively wider than they appear in the mask or design images. In order to simulate the aerial image, that is the image that will appear on the wafer, erosion is used to widen the dark lines to match the effects of the stepper optics, such as an ASML PAS 2500, as defined below in the equation for Ep. This erosion generally cancels out the dilation in step 230.

Next, in step 250 convolution is performed on image 140 in order to match the resolution of the stepper optics. In other words, image 140 is slightly blurred to simulate the blurring that will occur when the stepper optics are used to project the photomask image onto the wafer. Convolution may be performed as described above, for example by using a 2-dimensional gaussian blurring kernel as described in the Image Processing Handbook. The resultant image 150 is known as the simulated wafer aerial image, or simply as the aerial image. The aerial image is how the wafer would appear if photographic film were placed onto the wafer surface. Convolution is standard for a binary photomask. If a phase shift mask is used, complex convolution is needed, and a technique for performing such a convolution is shown in FIG. 6.

In some microlithography processes the simulated aerial image 150 is used for measurements. In other processes the wafer resist image is desired, for example, for line width measurements. Step 260 produces this wafer resist image. In step 260 erosion is performed again to simulate the effects of exposure and development of the photoresist and of wafer processing to produce a simulated wafer resist image 160. Image 160 is a simulation of how the wafer appears after both exposure and development. Preferably, erosion is performed as described herein. The amount of erosion is determined experimentally by adjusting the value so that the simulated image from a mask matches a SEM image of a wafer made from that mask. A common value for 150 nm wafer processes is 15 nm, determined as described above.

In step 270 an optional thresholding step is performed on the simulated wafer resist image 160 to produce a simulated processed wafer image 170. The threshold level may be determined manually or according to the wafer process specification. Image 170 simulates a SEM image of the wafer, showing the edges as bright and the flat areas as dark. Image 170 is often desired in order to compare to a SEM image of the wafer. The thresholding level is set to correspond to a particular exposure level, as is known in the art, thus image 170 represents an image of the wafer at a particular exposure level.

In step 280 an image is displayed to the user. This image may be image 150, 160 or 170, whichever image is required for the user's lithography process. The image is displayed on a computer display. This image can also be used to compare feature sizes and positions, such as for the purpose of determining if a size or position error will cause the resultant chip to malfunction. The image can also be used to determine if the designed shape of features on the mask will produce the intended result on the wafer, and if not the shapes arc varied and the simulation can be repeated.

Second Simulation Embodiment

In a second simulation embodiment, optimizations are used to speed up generation of the simulation, by a factor of 2 to 5× faster. For example, as dilation and erosion are sequentially applied to the image after deconvolution, it is possible to combine these two processing steps into a single erosion step. The single step ends up being an erosion (rather than a dilation) because the need to slightly widen lines (to match the stepper resolution) slightly outweighs the need to narrow lines due to edge diffraction in the source image optics. In other words, an erosion is performed, but the amount is reduced because of the dilation required. Or more simply, lines arc widened to compensate for the stepper resolution, but not quite so much in order to compensate for the diffraction in the source image.

Also, because the source image resolution is high compared to the stepper resolution, the deconvolution step is not needed, because image 110 is sharper than image 150. Since the image will be blurred anyway during convolution, the blurring is slightly reduced in order to compensate for the deconvolution step not being performed.

In step 410 a source image 310 of a photomask is obtained. Image 310 is an image of only a portion of a photomask, used for case of understanding the invention; larger regions are also possible. Preferably, image 310 is a digitized intensity source image obtained from an optical transmission source, such as any of the video inspection machines described above. Other types of images may be used, although it is preferable if they are converted to appear as an optical transmission image by converting the opaque areas to black, and the clear areas to white (or bright). Alternatively, the source image may be generated from the electronic photomask layout design. Generating the image from the electronic design is a step known to those of skill in the art.

In this example, image 310 of the photomask shows clear regions 312 which appear bright, and chrome lines of the photomask 314 which appear dark, four lines being shown. Of course, using other illumination techniques, the lines may appear bright and the clear regions may appear dark. Shown for ease of understanding is a very simplistic image 310 with only four lines. The present invention is applicable to photomask designs of any complexity.

In step 414 the image is resampled to a lower resolution in order to reduce the number of pixels that must be processed, thus improving the processing time. Produced is an intermediate resampled image 316. A lower resolution that works well is preferably one-third of the stepper resolution at the photomask. The minimum resolution is one-half of the stepper resolution due to the Nyquist sampling theorem as described at http://mathworld.wolfram.com/SamplingTheoremcm.html. This description of the Nyquist sampling theorem is incorporated by reference. The preferred resolution is 2-4 pixels per stepper resolution. More pixels per micron will reduce the speed and slightly increase the accuracy. For example, assume the stepper magnification is 4×, the wavelength used is 0.25 microns, and NA is 0.8 at the wafer (thus, NA=0.2 at the photomask plane), then using the formula for resolution

Res=0.61λ/NA,

the stepper resolution at the mask in microns is

StpRes=0.61××(0.25 microns)/0.2=0.76 microns.

Thus, the desired lower resolution per pixel is (0.76/4) or 0.19 microns per pixel. In other words, a desired lower resolution after resampling should be approximately 2-4 pixels per stepper resolution at the mask. Preferably, the resampling should be lossless, not using the “nearest neighbor” technique, as described in the Image Processing Handbook mentioned earlier. In lossless resampling, data from every source pixel is included in the resampled image. The resampled image may be enlarged at any time according to the preference of the user, using standard computer tools, such as Microsoft operating system display tools.

Next in step 418 the amount of erosion needed is calculated. In one embodiment, the amount of erosion required in fractional pixels is calculated. Where “Em” is the erosion in microns, “StpRes” is the stepper resolution in microns/pixel defined above, and “SrcRes” is the source image resolution in microns,

Em=(StpRes−SrcRes)/4.4.

SrcRes is zero when the source image is computed from the electronic mask design. The factor of 4.4 is approximate. Its exact value can be derived from physical optics to achieve better precision although that will not have a significant effect on the overall system precision. Now, where “Ep” is the erosion in pixels and “Rscale” is the scale of the resampled image from the previous step in microns per pixel, we have

Ep=Em/Rscale.

Ep will usually be less than one pixel. If Ep is greater than one pixel, then one or more whole pixel erosion operations are performed, and then a sub-pixel erosion is performed as needed.

Next, in step 440 erosion is performed on image 316 to produce a fast mask on stepper image 318. The erosion step 440 is used to correct the edge positions of the lines to help match the resolution of the stepper optics. Because the stepper has lower resolution optics than the video inspection machine, when the stepper projects the mask image onto the wafer, chrome lines will be projected on the wafer as being wider than they appear in the source image. Erosion is used to widen the lines to simulate how the stepper would widen them.

In step 450 convolution is performed on fast mask on stepper image 318. In this step, blurring is performed to match the resolution of the stepper, thus producing simulated wafer aerial image 350. The blurring may be performed by convolving a 2-dimensional gaussian kernel. For example, the blurring required is computed as follows:

BlurReq=SquareRoot(StpRes*StpRes−SrcRes*SrcRes).

The quantity “BlurRcq” is the radius of the gaussian blurring kernel used in the convolution, as understood by one familiar with image processing. The gaussian kernel can be modified to take into account partial coherence due to different NA values in the illuminator and in the objective lens.

Steps 460-480 are preferably performed as described in FIG. 3, in order to produce simulated wafer resist image 360 and simulated processed wafer image 370 which can be displayed to the user or used for measurement.

Convolution Involving a Phase Shift Mask

FIG. 6 is a flow diagram describing how convolution of an image may occur when a phase shift mask is involved. If an image represents a binary mask, convolution of that image may be performed using standard techniques. If an image represents a phase shift mask, however, the below technique works well in performing the convolution.

A binary mask typically has a clear substrate such as quartz or glass through which all light is transmitted; placed on top of this substrate arc the regions of chrome which define the mask. The chrome regions do not transmit any light; hence the phrase “binary mask.” A phase shift mask uses a clear substrate as well, but thinner chrome layers may be used. Also, regions of the substrate may be etched to define where chrome is placed. Infinite variations are possible regarding amount of etching and thickness of the chrome. As a consequence, while the substrate may still transmit all light, the regions defined by the chrome may transmit a small percentage of light, rather than none at all. Photons of light passing through the chrome are phase-shifted with respect to photons passing through the substrate. A phase shift mask, as opposed to a binary mask, is used in the industry in order to produce smaller features and increase immunity to focus and exposure errors.

Because of this phase shift, simulations of such a phase shift mask are convolved differently using complex images that include signal amplitude as well as relative phase, as described above.

In step 510 an intensity image is received. This is an intensity image that represents light transmitted through a phase shift mask. In step 520 the phase shift at the stepper wavelength is input. This is a known number, and is typically 180 degrees; however, other numbers such as may be measured on the actual mask, may be used.

In step 530 the wavelength at the stepper is input. This is the wavelength of light that is used to project the image of the mask onto the semiconductor substrate. Also input is the wavelength of the image, this is the wavelength of light that is used to view the mask and to produce the intensity image. In step 540, the phase of the image, theta, is calculated using the formula: theta=180 degrees×wavelength(stepper)/wavelength(image).

In step 550, for ease of processing, the intensity image is copied into a placeholder phase image, which will then be adjusted. In loop 560, for each pixel in the phase image, if the intensity of the pixel is 50% or more, then the phase for that pixel is set equal to theta. If the intensity is less than 50%, then the phase for that pixel is set equal to zero. Of course, a cutoff other than 50% may also be used in order to represent under- or over-etching of the mask, where the phase change occurs at a slightly different location than the intensity change. The resultant phase image will thus have the associated phase for each pixel of the image.

Finally in step 580, the intensity image is convolved using known techniques described above, using the phase information from the complex image. Typically this is referred to as a “complex convolution.” The resultant image is the convolution of the original intensity image.

Optimizations

As the image was resampled in step 414, it may be preferable to enlarge the image after the aerial image, the simulated wafer resist image or the simulated processed wafer are generated. Such enlargement would he to present a better image for the user, and can he done in ways known to those of skill in the art, such as the Microsoft operating system display function StretchDIBits. The images may be converted to floating point pixel values at step 414 and following for improved accuracy; this also allows use of smaller images. Conversion to floating point may occur at any step in the process, and preferably occurs before convolution. Special microprocessor instructions, such as Intel's MMX instruction set, may be used to accelerate the image processing functions, especially erosion, dilation, blending, scaling, and convolution. Separable convolution may be used for the convolution steps, and is described in Digital Image Processing, Gonzalez and Woods, 1992, Addison Wesley, which is incorporated by reference. Computation speed is increased by separating the 2-dimensional kennel into two 1-dimensional kernels, as is well understood in image processing.

Annular illumination can be simulated in the convolving step. The illumination source in the stepper is often modified from a circle with a diameter defined by the “sigina” value, to be an annulus (donut shape) where the center is blocked. The annulus is defined by its outer radius and inner radius. Use of such an annulus increases the allowed errors in focus and exposure in the stepper. This effect can be simulated by subtracting the image that would be produced by the blocked region of the illuminator. This subtraction is performed on the blurring convolution kernel, or by adding a second convolution of image 318, dividing the result by the area ratio of the annulus inside radius and outside radius, and finally subtracting from the first convolution of image 318. In both cases the blurring of the subtracted image is computed from the inner radius.

Computor System Embodiment

FIGS. 7A and 7B illustrate a computer system 900 suitable for implementing embodiments of the present invention. FIG. 7A shows one possible physical form of the computer system. Of course, the computer system may have many physical forms ranging from an integrated circuit, a printed circuit board and a small handheld device up to a huge super computer. In a preferred embodiment, computer system 900 is a personal computer, with at least 64 MB memory, a CPU running faster than 200 HMz, and hard disk capacity larger than 5 GB, and any operating system, such as a Microsoft operating system, Sun Solaris, Linux, Apple operating system version X, or others. The system 900 includes a monitor 902, a display 904, a housing 906, a disk drive 908, a keyboard 910 and a mouse 912. Disk 914 is a computer-readable medium used to transfer data to and from computer system 900.

FIG. 7B is an example of a block diagram for computer system 900. Attached to system bus 920 are a wide variety of subsystems. Processor(s) 922 (also referred to as central processing units, or CPUs) are coupled to storage devices including memory 924. Memory 924 includes random access memory (RAM) and read-only memory (ROM). As is well known in the art, ROM acts to transfer data and instructions uni-directionally to the CPU and RAM is used typically to transfer data and instructions in a bi-directional manner. Both of these types of memories may include any suitable of the computer-readable media described below. A fixed disk 926 is also coupled hi-directionally to CPU 922; it provides additional data storage capacity and may also include any of the computer-readable media described below. Fixed disk 926 may be used to store programs, data and the like and is typically a secondary storage medium (such as a hard disk) that is slower than primary storage. It will be appreciated that the information retained within fixed disk 926, may, in appropriate cases, be incorporated in standard fashion as virtual memory in memory 924. Removable disk 914 may take the form of any of the computer-readable media described below.

CPU 922 is also coupled to a variety of input/output devices such as display 904, keyboard 910, mouse 912 and speakers 930. In general, an input/output device may be any of: video displays, track balls, mice, keyboards, microphones, touch-sensitive displays, transducer card readers, magnetic or paper tape readers, tablets, styluses, voice or handwriting recognizers, biometrics readers, or other computers. CPU 922 optionally may be coupled to another computer or telecommunications network using network interface 940. With such a network interface, it is contemplated that the CPU might receive information from the network, or might output information to the network in the course of performing the above-described method steps. Furthermore, method embodiments of the present invention may execute solely upon CPU 922 or may execute over a network such as the Internet in conjunction with a remote CPU that shares a portion of the processing.

In addition, embodiments of the present invention further relate to computer storage products with a computer-readable medium that have computer code thereon for performing various computer-implemented operations. The media and computer code may be those specially designed and constructed for the purposes of the present invention, or they may be of the kind well known and available to those, having skill in the computer software arts. Examples of computer-readable media include, but are not limited to: magnetic media such as hard disks, floppy disks, and magnetic tape; optical media such as CD-ROMs and holographic devices; magneto-optical media such as floptical disks; and hardware devices that are specially configured to store and execute program code, such as application-specific integrated circuits (ASICs), programmable logic devices (PLDs) and ROM and RAM devices. Examples of computer code include machine code, such as produced by a compiler, and files containing higher level code that are executed by a computer using an interpreter.

Although the foregoing invention has been described in some detail for purposes of clarity of understanding, it will be apparent that certain changes and modifications may be practiced within the scope of the appended claims. For example, the video image input may come from a wide variety of sources, such as inspection tools, repair tools, or other microscopes, any of which may use light of any wavelength, SEM, FIB or other image sources. Also, analysis may be made of a variety of media, and not necessarily a photographic mask. Also, any type of light microscopic may be used as well as an electron microscope or other particle microscope. Therefore, the described embodiments should be taken as illustrative and not restrictive, and the invention should not be limited to the details given herein but should be defined by the following claims and their full scope of equivalents. 

We claim:
 1. A method of producing a simulated aerial image of a wafer, said method comprising: receiving a source image representing a photomask; computing an erosion amount for said source image; performing erosion on said source image by said erosion amount to produce an intermediate image; and performing convolution on said intermediate image to produce said simulated aerial image of said wafer.
 2. A method as recited in claim 1 further comprising: performing erosion on said simulated aerial image to produce a simulated wafer resist image, whereby said simulated wafer resist image represents the effects of exposure and development of photoresist on said wafer.
 3. A method as recited in claim 2 further comprising: performing thresholding on said simulated wafer resist image to produce a simulated processed wafer image, whereby said simulated processed wafer image represents the effects of a particular exposure level of photoresist on said wafer.
 4. A method as recited in claim 1 further comprising: resampling said source image to a lower resolution, whereby said method is performed faster as fewer pixels are processed.
 5. A method as recited in claim 4 wherein said lower resolution after resampling is approximately 2-4 pixels per stepper resolution at the mask.
 6. A method as recitcd in claim 1 further comprising: displaying said simulated aerial image to a user.
 7. A method as recited in claim 1 wherein said photomask is a phase shift photomask and wherein said step of performing convolution includes performing a complex convolution using a phase image.
 8. A method as recited in claim 1 further comprising: performing dilation on said intermediate image, whereby effects of edge diffraction are compensated for.
 9. A method as recited in claim 1 wherein said computing an erosion amount takes into account a dilation amount needed to compensate for edge diffraction.
 10. A method as recited in claim 1 wherein said performing erosion includes performing subpixel erosion using blending.
 11. A method as recited in claim 1 wherein said step of performing erosion includes performing subpixel erosion using a zoom-in, integer erode, zoom-out sequence.
 12. A method as recited in claim 1 wherein said step of performing convolution includes performing a separable convolution.
 13. A method as recited in claim 1 further comprising: converting said source image or said intermediate image to floating point pixel values, whereby said method is performed faster.
 14. A method of producing a simulated aerial image of a wafer, said method comprising: receiving a source image representing a photomask; performing deconvolution on said source image to produce a deconvolved image; performing erosion on said deconvolved image to produce an intermediate image; and performing convolution on said intermediate image to produce said simulated aerial image of said wafer.
 15. A method as recited in claim 14 further comprising: performing erosion on said simulated aerial image to produce a simulated wafer resist image, whereby said simulated wafer resist image represents the effects of exposure and development of photoresist on said wafer.
 16. A method as recited in claim 15 further comprising: performing thresholding on said simulated wafer resist image to produce a simulated processed wafer image, whereby said simulated processed wafer image represents the effects of a particular exposure level of photoresist on said wafer.
 17. A method as recited in claim 14 further comprising: displaying said simulated aerial image to a user.
 18. A method as recited in claim 14 wherein said photomask is a phase shift photomask and wherein said step of performing convolution includes performing a complex convolution using a phase image.
 19. A method as recited in claim 14 further comprising: performing dilation on said intermediate image, whereby effects of edge diffraction are compensated for.
 20. A method as recited in claim 14 wherein said performing erosion includes performing subpixel erosion using blending.
 21. A method as recited in claim 14 wherein said performing erosion includes performing subpixel erosion using a zoom-in, integer erode, zoom-out sequence.
 22. A method as recited in claim 14 wherein said step of performing convolution includes performing a separable convolution.
 23. A method as recited in claim 14 further comprising: converting said source image, said deconvolved image or said intermediate image to floating point pixel values, whereby said method is performed faster.
 24. A method of producing a simulated aerial image of a wafer, said method comprising: receiving a source image representing a photomask; calculating an apparent edge displacement due to edge diffraction; performing erosion on said source image using said edge displacement to simulate said apparent edge displacement, thus producing an intermediate image; and performing convolution on said intermediate image to produce said simulated aerial image of said wafer.
 25. A method as recited in claim 24 wherein said performing erosion includes performing subpixel erosion using blending.
 26. A method as recited in claim 24 wherein said performing erosion includes performing subpixel erosion using a zoom-in, integer erode, zoom-out sequence. 